i want to use HDMI function in my Zeboard,and i found a reference design on https://wiki.analog.com/resources/fpga/xilinx/kc705/adv7511 ,but i get errs when build the HDL project,fellowing is my steps :
1. git clone HDL project in https://github.com/analogdevicesinc/hdl
2. run command show on https://wiki.analog.com/resources/fpga/docs/build :
$make -C projects/adv7511/zed
it show the err:
============================
make: Entering directory `C:/Users/emy/Desktop/hdl-master/hdl/projects/adv7511/zed'
make -C ../../../library/axi_clkgen
make[1]: Entering directory `C:/Users/emy/Desktop/hdl-master/hdl/library/axi_clkgen'
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source axi_clkgen_ip.tcl >> axi_clkgen_ip.log 2>&1
make[1]: *** [axi_clkgen.xpr] Error 1
make[1]: Leaving directory `C:/Users/emy/Desktop/hdl-master/hdl/library/axi_clkgen'
make: *** [lib] Error 2
make: Leaving directory `C:/Users/emy/Desktop/hdl-master/hdl/projects/adv7511/zed'
=================================
3. i also try to build axi_clkgen library,
$cd library/axi_clkgen
$ make
but it also faild:
====================
rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil
vivado -mode batch -source axi_clkgen_ip.tcl >> axi_clkgen_ip.log 2>&1
make: *** [axi_clkgen.xpr] Error 1
===================
can you help how to build the hdl project ? thanks!
PS: my Vivado is 2016.1
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