Hello,
I am trying to write some specific data to the onboard flash to be able to read them without using Linux. According to http://zedboard.org/content/writing-file-flash-memory-and-reading-it-pspl, I have seen the examples Xilinx provides and tried to use the code in my application. My problem is that when running it the example test fails. I have pinpointed that it reads the data but it's not the same as written. In fact it is all "1" written. I don't know if I have done something wrong along the way or if I have missed a small detail. I would like your guidance on this issue.
Thank you.
Writing user data to Flash memory
Zedboard XADC bipolar signal
Hi!
Even if simple, I haven't been able to find an answer to my problem:
I have a sensor that I want to read through the XADC. I am working with Zedboard.
I have adapted the signal from the sensor with a resistor divider so that the amplitude of the signal is small enough.
My problem is that the signal is centered around 0V. It has both a positive part and a negative part.
As far as I have read, the XADC expects a signal from 0V to 1V in amplitude. Will this signal be a problem for it? Or beeing a differential signal I can assume that the DC component can be neglected?
This is, can I connect the signal as it is, or do I have to avoid connecting any negative voltage to the XADC?
Thanks in advance for your help!
General Guidelince to Install Linux on Zed board and How to Install PYNQ Linux on ZedBoard
Hi,
I've sucessfully ported PYNQ Linux on ZedBoard, here is how...
https://superuser.blog/pynq-linux-on-zedboard/
Zedboard with Xilinx SDK
As we are running simple Hello world program on Xilinx SDK, getting following error:
14:18:55 INFO : Unable to read in MSS file C:\Users\csioci\workspace\Devendra_bsp\system.mss : null
14:18:55 ERROR : Failed to closesw "C:/Users/csioci/workspace/Devendra_bsp/system.mss"
Reason: Cannot close sw design 'C:/Users/csioci/workspace/Devendra_bsp/system.mss'.
Design is not opened in the current session.
How to fix this problem.
XADC accuracy
Hello,
What will be the XADC accuracy of zynq with internal and external reference voltage?
What will be the effects on ADC performance while using internal reference?
Thank you.
IDS on zedboard
Hi everyone,
I want to implement an intrustion detection system on zedboard.
I want to use PL for string matching and PS to handle the events on possitive detection.
Being a beginner in this area (FPGA + networking), I would like to know if this is possible and any informations or any type of instructions or steps that can help me is tremendously appreciated.
how to realise ps interrupts pl using IRQ_P2F_GPIO
Is there an example about how to realise ps interrupts pl using IRQ_P2F_GPIO? I have visted xilinx.com,zedboard.org.but i can't find something helpfull.
So I need your help.
ZedBoard - Adv7511 Configuration with VDHL
Hi,
I want to configure the ADV7511 IC of the Zedboard with my VHDL module.
Is there any open source example for this aim?
PS-1: I checked Analog Devices examples, but cannot find any.
PS-2: My aim is by using FMC Imageon card, get the HDMI IN and run an LCD screen over HDMI again.
I can use ZedBoard's or Imageon's HDMI OUT.
For this aim I need to configure ADV7511 and ADV7611 ICs.
I have a ZedBoard. So, I will write a Test Pattern Generator which will generate 16 bit 4:2:2 YCbCr input data to the ADV7511 on the Zed.
And I will design a Configuration Module for ADV7511.
But, it will be very nice, if i can find a functioning example.
BR,
Sercan
Design with axi c2c ip core
Dear all,
I am doing a design with axi c2c bridge ip core and in which I used two soft axi c2c bridge ip cores and one zynq processing system ip. Out of two c2c bridges one I configured as master and another as slave and I selected interface as ddrIo.I succefully validated my generated block design and the problem which I am facing is while generating bitfile synthesis is failed. The errors are as follows
1.module 's00_couplers_imp_1FI55ZU' not found.
2.[Synth 8-285] failed synthesizing module 'design_1'.
3.failed synthesizing module 'design_1_wrapper'.
I followed techniques like resetting the generated output products and reset synthesis run .
Can anyone tell me the what are the reasons behind it and how to resolve this issue.
In my application i need to communicate with two same FPGA chips (ex:zynq board)
Can anyone provide the detailed reference manual or methods to implement such communication?
C132 and C247 capacitor come out of board
C132 and C247 capacitor come out of board.... which type of problem may occur ...??
Is there any problem with circuit functionality ..?
I have the capacitor, is it possible to soldering again...??
Zedboard pins banks and MIO
Hi!
I am trying to learn how to use the LEds and switches in the Zedboard.
I have been following this article form Adam Taylor:
https://forums.xilinx.com/t5/Xcell-Daily-Blog/Driving-the-Zynq-SoC-s-GPI...
My doubts come when assigning the proper number to the peripherals, LED and switches. I have seen in the .xdc that for example for the LEDs, they are on Bank 33. I have defined the constraints for all of them.
So, for LED0, the pin is T22, Bank 33. From that data, how can I know the MIO I must set in the .c code?
Adams blog says: "Define the output pin we want to toggle. In this case it is pin 8 within the bank of 10, MIO 47"
And defines the pin:
#define ledpin 47
But I don't know where does it come from. I don't know to translate it into my project.
Can somebody help me? Thanks in advance for your help
This is the line I use for LEd0 in my constraints file:
set_property PACKAGE_PIN T22 [get_ports {LD0}] # "LD0"
How can I access it form my C code to change the state through the function XGpioPs_WritePin ?
ADV7511 HDMI, Updated project version ?
Hello. I hope I will get an answer, because I am quite stuck...
I have been trying to get HDMI working with bare metal, and so far no luck...
My project is a custom graphic controller, so it is not just sticking a AXI Stream to a module, reading DDR and writing to the ADV.
(I have taken various route (and many hours) as described in the following link and in google if you type "zedboard hdmi adv7511", so please do not send something I already googled a thousand time.)
I am running 2016.4 version of Vivado.
1/ I did not want to go with custom IP from xilinx : I am writing my own pixel pipeline and just need the part accessing the ADV. So I need to control what is going on... Moreover, I would like to have my design as portable as possible.
So I did not use this solution from ZedBoard site : ZedBoard HDMI VIPP, Vivado 2014.1
2/ I used GIT, directly taking samples from ADV directly running TCL script, no luck. Failed miserably... Whatever the reason.
3/ I used from the Zedboard site : HDMI Bare Metal Reference Design Using ADV7511 and ADI IP
Did not work in 2016.4, so I downloaded and installed 2013.4 (which refused for whatever reason to launch the GUI after install) but I could at least run the tcl command, so I got the thing to compile.
Then imported into my latest Vivado version, and bam... lots of unsolvable error due to IP design change.
I would not mind updating the thing if at least I had something workable step by step and be sure I do not break anything, but debugging something that I did not even design...
4/ Directly went with the only project that mostly ran RIGHT AWAY (we must conceal simplicity is the mother of all dev)
http://hamsterworks.co.nz/mediawiki/index.php/Zedboard_HDMI_v2
2 VHDL files + 1 UCF (that I had to convert of course to XDC because there is no import function in Xilinx tools)
But unluckily, I was not able to have a valid HDMI output (seemed like the DDR data pumping into ADV has a timing issue, I do not get black, red, etc... vertical color stripe but alternating colors every pixel (RED, YELLOW, RED YELLOW))
That person is using ISE, and I have seen that ISE seems to generate more timing efficient design, I was wondering if my visual problem could be a poort timing issue but whatever...
It is driving me a bit crazy, I have spent probably nearly 30 to 40 hours on that stuff...
Is there any plan to have an upgraded project of the 2013.4 project to newer version, or a minimalist thing that just work ?
(even without memory to pixel path, just take the X & Y counter to generate RGB values with a XOR or something ).
Regards,
Romain.
uart IOs on Zedboard
I am trying to implement a Uart Lite IP core on my Zedboard. But I am having issues with Uart RX and TX pin mapping in the XDC file. I am getting the following errors:
[Vivado 12-1411] Cannot set LOC property of ports, Site location (IOPAD_X1Y125) is not valid for the shape with the following elements:
uart_rx_IBUF_inst
uart_rx
[D:/VivdoProjects/SCRs_CNTR_Uart/ConstraintsFile.xdc:92]
As per this reference: http://vserver.13thfloor.at/Stuff/AXIOM/ALPHA/xc7z020clg484_zedboard.txt
my mapping is as follow:
set_property IOSTANDARD LVCMOS33 [get_ports uart_rx]
set_property PACKAGE_PIN D11 [get_ports {uart_rx}]
set_property IOSTANDARD LVCMOS33 [get_ports uart_tx]
set_property PACKAGE_PIN C14 [get_ports {uart_tx}]
can anyone explains what's happening here?
Thanks
communicate the 2 ARM and PL ?
Dear all,
I am working with zed board(ZC7020) and i have a question in my mind.The question is "it's possible to implement a simple communication read / write from the 2 ARM processor's and the PL" ?
In other way, i want to make the first ARM write something into the PL ( maybe via a register ) using the AXI bus, and the second ARM will read this message and print it on console. I hope it is possible but i don't know how to proceed to achieve this. if some one tried this before suggest me with a document or reference design?
communicate the 2 ARM and PL ?
Dear all,
I am working with zed board(ZC7020) and i have a question in my mind.The question is "it's possible to implement a simple communication read / write from the 2 ARM processor's and the PL" ?
In other way, i want to make the first ARM write something into the PL ( maybe via a register ) using the AXI bus, and the second ARM will read this message and print it on console. I hope it is possible but i don't know how to proceed to achieve this. if some one tried this before suggest me with a document or reference design?
[Working] AXI Slave for Audio ADAU1761 on Zedboard.
Hi !
I have used the ADAU1761 design made by Hamster and created a clean stand alone AXI Slave to allow the CPU to push data to the DAC or pop data from the ADC of the ADAU1761 audio codec chip.
I post the message here, hoping it will allow other people to be more efficient, and also make it a base for a more full grown system. (Ex : programming of the I2C)
I hope it will stay so that people doing a search in google with keywords like ADAU1761 audio zedboard will find it.
The link :
https://github.com/Laxer3a/ZedBoardAudio
The original work of Hamsterwork (who did all the heavylifting, thank you again so much !)
http://hamsterworks.co.nz/mediawiki/index.php/Zedboard_Audio
PS : This git provide a step by step explaination of one has to do to include the design.
Zedboard with LVDS camera output - MT90V34
Hi everyong,
Like everyone else that need help, I am new with the FPGA and the Zedboard. However, I have done various trial with zedboard and VHDL like buttons, leds .etc...
But for the project that I am following, the requirement is much more, I need to interface the image sensor MT9V034 with the LVDS output but not parallel bus.
I saw on the datasheet of Zedboard that both Pmod and FMC support differential signals.
I divided my works into 2 main part:
1. Interfacing image sensor
- LVDS interface
- controll image sensor
2. Display the video/images
- display on screen through VGA port
- send the data to PC through UDP stream (Ethernet) or through UART
That's plan, but could you please give where should I starts?
I have read alot from the internet, however they seem do not match my project. and I get confuse to where to start.
I am really appreciate any help.
Thanks
Accessing Switches and Buttons in Zedboard remotely
Dear friends.
I have been designing DC motor control for sometime now in Verilog from ZEDBOARD . So far i can control via pushbuttons and switches for the rotation of the motor and speed. I would like to extend my design.
I was looking for a way that i can control these switches and pushbuttons remotely i dont mean wirelessly(but if its possible it will be okay). I have only seen some suggestions about Ethernet by Linux but bad luck i don't know much of Linux. So, if there is any method that can be of help i will be thankful.
Regards
Smeagol.
Evaluation of driver assistance systems with a car simulator using a virtual and a real FPGA platform using zedboard
I am working on Evaluation of driver assistance systems with a car simulator using a virtual and a real FPGA platform using zedboard with AIEEE paper with presented in 2013.
http://ieeexplore.ieee.org/abstract/document/6661568/?reload=true
but i am not getting proper documentation for this project.
If anyone is work on this related project please give me some suggestion.
Thanks for your time.
Package inspection
Hello everyone,
I kindly ask for some start points that may help me in developing an linux application on zedboard that inspect the payload of tcp/udp package received through eth interface. I had search a lot on internet/forums about this subject but i could not find some strong hints.