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Hi zedboard.org,
I am working on zedboard, which contains 3 mini USB interface, e.g., usb-jtag, usb-uart, usb-otg.
In Vivado block diagram, I am able to allocate zynq7 MIO configuration for both USB0 and USB1 (though USB1 conflict to UART1 and SD0).
Assuming USB0 connects to usb-otg, then where is USB1 going with?
Please advise, thanks in advance.
Mike